IEC 63378-6:2026 pdf download,Thermal standardization on semiconductor packages – Part 6: Thermal resistance and capacitance model for transient temperature prediction at junction and measurement points.

IEC 63378-6:2026 introduces a thermal resistance and capacitance model specifically designed for semiconductor packaging. This model, referred to as the Digital Transformation using Thermal Resistance and Capacitance (DXRC) model, is utilized to forecast transient temperatures at both junction and measurement locations.

This document is applicable to various semiconductor packages, including TO-252, TO-263, and HSOP. It facilitates the analysis of single-chip packages that dissipate heat from a single package surface, thus enhancing thermal management capabilities in electronic applications.